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LT - APPARATUS AND METHOD OF INTERFACING CO-PROCESSORS AND INPUT/OUTPUT DEVICES VIA A MAIN MEMORY SYSTEM
EN - APPARATUS AND METHOD OF INTERFACING CO-PROCESSORS AND INPUT/OUTPUT DEVICES VIA A MAIN MEMORY SYSTEM

Legal status

Patent not validated

Bibliographic data
Indications of the International Patent Classification (IPC)
(51) INT.CL. G06F 13/38
G06F 12/02
H03M 13/27
H03M 13/05
G06F 12/06
G06F 13/42
G06F 11/10
G06F 13/20
G06F 13/40
European patent
(11) Number of the document 2673713
(13) Kind of document T
(96) European patent application number 12744797.7
Date of filing the European patent application 2012-02-08
(97) Date of publication of the European application 2013-12-18
(45) Date of publication and mention of the grant of the patent 2021-01-27
(46) Date of publication of the claims translation
PCT application
(86) Number PCT/CA2012/000110
Date 2012-02-08
PCT application publication
(87) Number WO 2012/106806
Date 2012-08-16
Priority applications
(30) Number Date Country code
201161457233 P 2011-02-08 US
201113303048 2011-11-22 US
Inventors
(72)
TAKEFMAN, Michael L., CA
AMER, Maher, CA
BADALONE, Riccardo, CA
Grantee
(73) Rambus Inc., 4453 N First Street, Suite 100, San Jose, CA 95134, US
Title
(54) APPARATUS AND METHOD OF INTERFACING CO-PROCESSORS AND INPUT/OUTPUT DEVICES VIA A MAIN MEMORY SYSTEM
  APPARATUS AND METHOD OF INTERFACING CO-PROCESSORS AND INPUT/OUTPUT DEVICES VIA A MAIN MEMORY SYSTEM